NS7520
- 32-Bit ARM7TDMI RISC
- Integral 10/100 Ethernet MAC
- 13-Channel DMA Controller
- Serial Ports
- Bus Interface
- Timers
- General Purpose I/O
- Clock Generator
- Operating Voltage
- Operating Frequency
- Package
- Details on ARM7 Core
32-Bit ARM7TDMI RISC Processor
- Full 32-bit ARM mode, plus 16b Thumb mode instruction sets which can be mixed for performance/code density tradeoffs
- 15 general-purpose 32-bit registers
- 32-bit program counter and status register
- 5 supervisor modes, 1 user mode
- 35, 46, 55 MHz speed versions available
- Embedded ICE-RT real-time debug unit
- Full support for 1149.1 JTAG boundary scan testing
Integral 10/100 Ethernet MAC
- 10/100Mbit MII based PHY interface
- 10 Mbps ENDEC interface supports TP-PMD and fiber-PMD devices
- Full or half duplex
- Auto sensing
- 512B Tx FIFO; 2 kb Rx FIFO
- Intelligent receive-side buffer size selection
- External CAM filtering support
- Separate Tx and Rx DMA channels
13-Channel DMA Controller
- 6 fly-by and memory-to-memory channels
- 2 channels support Ethernet modules
- 4 channels support 2 serial modules
- 2 external DMA memory-to-memory channels
- 5 internal DMA memory-to-memory channels
- DMA arbiter, with bandwidth allocation for each channel
Serial Ports
- 2 fully independent HDLC/UART/SPI serial ports
- 32 byte transmit/receive FIFOs
- Internal or external clock support
- 2 dedicated DMA channels per module
- Asynchronous mode bit rates: 75 bps - 230.4 kbps
- Synchronous mode bit rates: 1200 bps - 4 Mbps
- Odd, even, or no parity
- 5, 6, 7 or 8 bits
- 1 or 2 stop bits
- Both internal and external clock support
- Receive side character and buffer gap timers
- 4 receive side data match detectors
Bus Interface
- 32-bit data, 28-bit address bus
- 5 independent programmable chip selects
- Supports 8-, 16-, 32-bit peripherals
- Supports external address decoding and cycle termination
- Supports dynamic bus sizing
- Supports ASYNC and SYNC peripheral timing
- Glueless support for Flash, SRAM, EDO DRAM, SDRAM, EEPROM
- Address multiplex support
- Internal refresh controller (CAS before RAS)
- Up to 16 MB SDRAM
- Burst-mode support
- 0-63 programmable wait states per chip select
Timers
- 2 independent 27-bit programmable timers
- Programmable watch-dog timer (interrupt or reset on expiration)
- Programmable bus timer
General Purpose I/O
- 16 programmable I/O interface pins
Clock Generator
- Low-cost external crystal
- On-board programmable Phase Lock Loop (PLL)
- Optional external oscillator
Operating Voltage
- Core: 1.5V
- I/O Ring: 3.3V ± 10%
Operating Frequency
- 36 MHz: 0º C to 70º C
- 46 MHz: -40º C to 85º C
- 55 MHz: 0º C to 70º C
- 55 MHz: -40º C to 85º C
Package
- 177-pin BGA
- 0.8 mm ball pitch
- 13mm x 13mm
- Lead-free, RoHS compliant
Details on ARM7 Core
- 32/16-bit RISC architecture (ARM v4T)
- 32-bit ARM instruction set for maximum performance and flexibility
- 16-bit Thumb instruction set for increased code density
- Unified bus interface, 32-bit data bus carries both instructions and data
- Three-stage pipeline 32-bit ALU
- Very small die size and low power consumption
- Fully static operation
- Coprocessor interface
- Extensive debug facilities:
- EmbeddedICE-RT real-time debug unit
- JTAG interface unit
- Interface for direct connection to Embedded Trace Macrocell (ETM)
