It sounds like you want external IO. Here is the following info which should still be relevant for Rabbit 4000 boards:
Although this note was written for the Rabbit 2000 processor it is still valid
for the Rabbit 3000. The basic difference is that the R3000 supports a feature
called Auxiliary External I/O. This allows the external I/O accesses to be done
via parallel Ports A and B rather than the memory data and address busses. On
all of our R3000 based RabbitCore modules you must use this feature for external
I/O since the data and address busses do not come off the boards.
The only required change to a program is the additional definition at the top of
Another option available on the R3000 is to have high or low true I/O strobes.
The R2000 is limited to low true only.
The External I/O feature of the Rabbit processors allows the user to access up
to 64 KB of "external" I/O space. The I/O space is divided into eight 8 KB pages
based on the upper three bits of the specified address. These three bits are
decoded by the processor and are used to select which bit of parallel port E is
to be used as the I/O strobe.
The bits of Parallel Port E can be individually enabled to act as I/O strobes.
Each strobe/bit accesses an 8 KB page using the lower 13 address bits of the
Rabbit 2000 address bus. The I/O devices also connect to the 8 bit data bus.
The bits of Parallel Port E are enabled as I/O strobes by using PEFR. Each bit
of PEFR controls the operation of the corresponding bit of Port E. A "0" value
causes the bit to used as a parallel I/O bit. A "1" value causes the bit to be
used as an I/O strobe. The appropriate PEDDR bits should also be set so that the
selected pins are programmed to be outputs. Also, since the bits of Port E are
initialized as inputs when the processor is reset, you should install a pull-up
resistor on each pin which will be used as I/O strobes.
The specific operation of the I/O strobe is controlled by IBnCR where "n"
represents the appropriate bit in port E. The IBnCR allows the bit of port E to
act as chip select pulse, write pulse, read pulse, or the OR of write and read
pulses - all low true. Also, IBnCR allows the programmer to select the number of
wait states basically controlling the width of the selected pulse type. One of
the bits in the register is also a write enable. If this bit is not set the
processor will not generate the /IOWR signal.
The other signals to be used are /IOWR, /IORD and /BUFEN. /IOWR is pulsed low
for a write operation. /IORD is pulsed low for a read operation. /BUFEN is
pulsed low in either case. The timing for these signals is detailed in the
Rabbit 2000 Microprocessor User's Manual.
It is recommended that if there is the possibility of a relatively heavy load
being placed on either bus then bus drivers and bus transceivers be used.
The bus drivers would buffer the address bus. The bus transceivers would buffer
the data bus. The transceiver operation must be such that it is normally
transmitting the data bus to the external I/O devices. Only receiving when an
I/O read is taking place. To do this either /IORD or /IOWR must be used to
control the direction of the transceiver. If /BUFEN is also used to enable the
devices then pull-up or pull-down resistors must be placed on the "outboard"
side of the devices to insure that the external I/O device inputs are never