I have tested the macros
#define HDLC_F_USEPORT E
#define HDLC_E_USEPORT C
but the port PE0/TCLKF still is not working as an input clock.
If we see the signal with oscilloscope, the clock is above 3.3V, however with PC4/TCLKE does not happen it is on 0V
Exactly ports configuration is as follow
WrPortI(PCDDR,&PCDDRShadow,0x41);
WrPortI(PEDDR,&PEDDRShadow,0xFE);
// Parallel port C, D and E output type configuration (0-Driven high/low 1-Open drain)
WrPortI(PCDCR,&PCDCRShadow,0x00);
WrPortI(PEDCR,&PEDCRShadow,0x00);
// Parallel port C, D and E alternate options output pins configuration
WrPortI(PCALR,&PCALRShadow,0x00);
WrPortI(PCAHR,&PCAHRShadow,0x00);
WrPortI(PEALR,&PEALRShadow,0xFC);
WrPortI(PEAHR,&PEAHRShadow,0xFF);
// Parallel port C, D and E alternate options input pins configuration
// Parallel port C, D and E type configuration (0-I/O 1-Alternate function)
WrPortI(PCFR,&PCFRShadow,0xFA);
WrPortI(PEFR,&PEFRShadow,0xFF);
Later on we used
HDLCopenE
HDLCopenF
and
HDLCextClockE(1);
HDLCextClockF(1);
Is it not necessary to configure other registers?
BR