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RCM6760 - RST 38 Occured / Run Time Error

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I'm using RCM6760 modules for a project and something strange is happening.
In some modules the program is crashing with one of this two errors:

Error 1) Run Time Error: An RST 38 occurred, but the RST38 vector is uninitialized Address 66:6bbe
Error 2) Run Time Error: A system mode violation interrupt occured, but the system mode violation
vector is uninitialized Address 01:6bbe

I've tried to use several examples of digi sample projects like "\Samples\tcpip\http\CGI.C"
to diagnose the problem and the modules in question have the same behavior.

I thought it might be the flash corrupted and I tried to run the program directly in RAM with the
option "Compile" - "Compile Project To Target" - "Store Program in RAM", but I had the same results.

I've tried to use DynamicC 10.72 / DynamicC 10.72B / DynamicC 10.72C. Running in Windows 10 Pro
The modules reference is: RCM6760 (1P)20-101-1321 G

1) What can cause these errors in the modules?
2) Could it be damaged RAM?
3) There is any way i can diagnose RAM memory?

Luis Silva
asked Nov 1, 2017 in Rabbit Software by luissilva New to the Community (1 point)

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1 Answer

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You're certain that this happens with unmodified versions of Dynamic C? Always the same address? How about test programs that don't use TCP/IP? Programs with TCP/IP make use of the external memory of the RCM6760, but simpler programs do not.

I'm attaching a test program for the external SRAM that you could try. It was used to troubleshoot a hardware issue triggered by 32-bit reads of the SRAM on a revision of RCM6650W boards (that did not ship to customers).

Please reach out to your sales rep or Digi support (http://www.digi.com/support) about this issue to identify possible causes.
// set this define to 1 for verbose output for each test failure, 0 for quiet #define VERBOSE 1 // uncomment this define to initialize memory at startup #define INITIALIZE_MEMORY #define STDIO_DEBUG_SERIAL SADR #define STDIO_DEBUG_BAUD 115200 #define STDIO_DEBUG_ADDCR #define START_ADDRESS 0x00100000ul #define STOP_ADDRESS (START_ADDRESS + 0x00100000ul) unsigned long run_test(int verbose) { // track the mis-read bits in the 2nd MSB of the reads unsigned int failure_patterns[256] = { 0 }; // track the flipped bits in the reads unsigned int failure_bits[32] = { 0 }; // track which read failed by finding the odd-man out // 0 = all three read differed; 1, 2, 3 = read that differed unsigned int failed_read[4] = { 0 }; unsigned long address, readaddress; unsigned long read1, read2, read3; unsigned long badvalue, flippedbits, mask; unsigned long test_count = 0, failures = 0; int i; if (verbose) { printf("Testing 32-bit reads from odd addresses from 0x%06lx to 0x%06lx.\n", START_ADDRESS, STOP_ADDRESS); } for (address = START_ADDRESS + 1; address < STOP_ADDRESS - 3; address += 2) { ++test_count; #asm __nodebug ipset 3 ld pz, (sp+@sp+address) ld pw, (pz) ld px, (pz) ld py, (pz) ld (sp+@sp+read1), pw ld (sp+@sp+read2), px ld (sp+@sp+read3), py ld (sp+@sp+readaddress), pz ipres #endasm if (read1 != read2 || read1 != read3) { // which read failed? if (read1 == read2) // read3 mismatch { badvalue = read3; ++failed_read[3]; } else if (read1 == read3) // read2 mismatch { badvalue = read2; ++failed_read[2]; } else if (read2 == read3) // read1 mismatch { badvalue = read1; ++failed_read[1]; } else // no reads matched { badvalue = 0; ++failed_read[0]; } ++failures; flippedbits = (read1 != read2) ? (read1 ^ read2) : (read2 ^ read3); // mark which bits were flipped in the reads for (i = 0, mask = 1; i < 32; mask <<= 1, ++i) { if (flippedbits & mask) { ++failure_bits[i]; } } if (verbose) { ++failure_patterns[(unsigned char)(badvalue >> 16)]; printf("ERR: Read 0x%08lx, 0x%08lx, 0x%08lx from 0x%06lx (BYTE2:0x%02x)\n", read1, read2, read3, address, (unsigned char)(badvalue >> 16)); } } if (readaddress != address) { ++failures; if (verbose) { printf("ERR: read back address 0x%06lx as 0x%06lx (bad bits: 0x%06lx)\n", address, readaddress, readaddress ^ address); } } } if (verbose) { if (failures != 0) { printf("%lu total failures of %lu (%.6f%%)\n", failures, test_count, failures * 100.0 / test_count); for (i = 1; i < 4; ++i) { printf(" read%u mismatch:%5u\n", i, failed_read[i]); } printf( "no reads matched:%5u\n", failed_read[0]); for (i = 0, mask = 1; i < 32; mask <<= 1, ++i) { printf(" bit %2u (0x%08lx):%5u\n", i, mask, failure_bits[i]); } for (i = 0; i < 256; ++i) { if (failure_patterns[i]) { printf(" pattern 0x%02x:%5u\n", i, failure_patterns[i]); } } } else { printf("Test PASSED\n"); } } return failures; } void main(void) { unsigned long address, error_count; // Note that this test works regardless of the SRAM contents. During // testing, we found that varying data stored in memory resulted with // a higher failure rate, so recommended test procedure is to initialize // memory at the start of the test. #ifdef INITIALIZE_MEMORY printf("Initializing memory to low byte of address.\n"); for (address = START_ADDRESS; address < STOP_ADDRESS; ++address) { *(unsigned char far *)address = (unsigned char)(address & 0xFF); } #endif error_count = run_test(VERBOSE); if (error_count) { printf("SRAM Test: %lu total FAILURES\n", error_count); } else { printf("SRAM Test: PASSED\n"); } }
answered Nov 1, 2017 by TomCollins Veteran of the Digi Community (1,439 points)
selected Nov 13, 2017 by luissilva
Hi Tom,

I ran the program you submitted and validated the RAM correctly after entering the START_ADDRESS and STOP_ADDRESS with the correct values.

Thanks for the help, i already submitted the case to Digi support, when they gave me an answer i inform the forum to be common knowledge.
The default values in the test should test the entire external SRAM, which is the possible cause of the problem.  Do you have an RCM6710 you can test with?  That lacks the additional RAM chip.