The parallel video connects the Image Processing Unit (IPU) to an external parallel LCD video interface.

Kernel configuration

You can manage the parallel driver support through the kernel configuration option:

  • LCD PLATFORM (CONFIG_LCD_PLATFORM)

This option is enabled as built-in on the ConnectCore 6 kernel configuration file.

Platform driver mapping

The LCD drivers are located at:

File Description

drivers/video/fbdev/mxc/mxc_lcdif.c

LCD display driver

Device tree bindings and customization

The LCD interface device tree binding is documented at Documentation/devicetree/bindings/fb/fsl_ipuv3_fb.txt.

The Parallel video interface is defined in the ConnectCore 6 SBC device tree files.

IOMUX configuration

Parallel video interface IOMUX configuration:

&iomuxc {
	ipu1 {
		/* Parallel display */
		pinctrl_ipu1_di0: ipu1grp-2 {
			fsl,pins = <
				/* DISP0_CLK */
				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
				/* DISP0_DRDY */
				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
				/* Data bus */
				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
				MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
				MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
				MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
				MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
				MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
				MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
			>;
		};
	};
};

Enable parallel LCD and disable conflicting interfaces

The parallel LCD display is disabled by default since some of the pads it uses are also multiplexed with other functionality. Enable the lcd node and disable the following conflicting interfaces on your device tree:

  • MIPI display

  • PWM1

@@ -55,9 +55,9 @@
  * IPU0:DI0 with MIPI display: comment the 'mipi_dsi' and 'mipi_dsi_reset' nodes.
  * Pad DISP0_DAT8 with PWM1: comment the 'pwm1' node.
  */
-//&lcd {
-//     status = "okay";
-//};
+&lcd {
+       status = "okay";
+};

 &ldb {
        status = "okay";
@@ -158,13 +158,13 @@
 /*
  * The MIPI display conflicts with IPU0:DI0 on the parallel LCD.
  */
-&mipi_dsi {
-       status = "okay";
-};
+// &mipi_dsi {
+//     status = "okay";
+// };

-&mipi_dsi_reset {
-       status = "okay";
-};
+// &mipi_dsi_reset {
+//     status = "okay";
+// };

 &pcie {
        status = "okay";
@@ -174,9 +174,9 @@
  * PWM1 uses pad DISP0_DAT8 on pin 10 of the parallel LCD connector.
  * Disable PWM1 if you want to use the parallel LCD.
  */
-&pwm1 {
-       status = "okay";
-};
+// &pwm1 {
+//     status = "okay";
+// };

 &ssi2 {
        status = "okay";

Display timings

The LCD driver doesn’t support display timings from the device tree, so the timings must be hardcoded in a database array in the driver itself. Specify LCD display timings in your platform’s device tree using the frame buffer property mode_str:

mxcfb3: fb@2 {
	compatible = "fsl,mxc_sdc_fb";
	disp_dev = "lcd";
	interface_pix_fmt = "RGB666";
	mode_str ="FUSION7";
	default_bpp = <16>;
	int_clk = <0>;
	late_init = <0>;
	status = "disabled";
};

LCD as primary display

The default device tree establishes the HDMI video interface as the primary display (on frame buffer 0). This configuration can be overridden through the video kernel command line argument passed by the bootloader.

For example, to enable the LCD on frame buffer 0, append the following to U-Boot environment variable extra_bootargs:

=> setenv extra_bootargs $extra_bootargs video=mxcfb0:dev=lcd,mode_str=FUSION7 video=mxcfb1:dev=hdmi,1920x1080M@60
=> saveenv

Enable Fusion 7" display

The ConnectCore 6 SBC selects the AUO 10" LCD display by default. To enable the Fusion 7" display, make the following changes to your final platform DTS file (file imx6q-ccimx6sbc.dts} is used as example):

  • Make the Fusion 7" the default display.

  • Set the pinctrl to one without pinctrl_lcdif_hvsync since the 7" display doesn’t need VSYNC and HSYNC signals.

  • Remove the lcd-supply property because the LVDS bridge is not needed for this display.

  • Enable the Fusion touch controller and disable the Goodix.

  • Change the touch controller interrupt to match the line at the LCD connector.

diff --git a/arch/arm/boot/dts/imx6q-ccimx6sbc.dts b/arch/arm/boot/dts/imx6q-ccimx6sbc.dts
index 471c0594af33..07b640b2a055 100644
--- a/arch/arm/boot/dts/imx6q-ccimx6sbc.dts
+++ b/arch/arm/boot/dts/imx6q-ccimx6sbc.dts
@@ -81,12 +81,12 @@
        };

        /* Uncomment to enable the fusion touch, used with hsd101pfw2 */
-       //fusion@14 {
-       //      status = "okay";
-       //};
+       fusion@14 {
+               /* Interrupt for parallel LCD */
+               interrupt-parent = <&gpio2>;
+               interrupts = <1 1>;
+               status = "okay";
+       };

        goodix_touch: gt911@14 {
-               status = "okay";
+       //      status = "okay";
        };

        /* MIPI-CSI2 camera */
@@ -109,9 +109,9 @@
  * The MIPI display conflicts with IPU0:DI0 on the parallel LCD.
  */
 &mipi_dsi {
-       status = "okay";
+//     status = "okay";
 };

 &mipi_dsi_reset {
-       status = "okay";
+//     status = "okay";
 };

 &pcie {
@@ -165,7 +165,7 @@
  * Disable PWM1 if you want to use the parallel LCD.
  */
 &pwm1 {
-       status = "okay";
+//     status = "okay";
 };

 &ssi2 {