The i.MX8M Nano System-On-Chip has a lot of functionality but a limited number of pins (or pads). Even though a single pin can only perform one function at a time, they can be configured internally to perform different functions. This is called pin multiplexing.

The ConnectCore 8M Nano Hardware Reference Manual contains a Module pinout section that identifies all module pads with their corresponding signal name used in the reference boards schematics, and maps them to the corresponding i.MX pad name.

Pad multiplexing

The NXP i.MX8M Nano Reference Manual uses a pad name such as ECSPI2_SCLK to refer to the System-On-Chip pads. This pad name typically corresponds to the first pad functionality.

Electrical parameters of a pad

Every pad also has a PAD configuration control register where you can set the pad’s electrical parameters. See the NXP Influence of Pin Setting on System Function and Performance application note for details about setting functional and electrical parameters.

The i.MX8M Nano GPIOs are configurable and can work at 1.8V or 3.3V depending on the power domain of the pad they are on. To determine the working voltage of a given GPIO, see GPIO pads power domains.

Use the device tree to configure pin IOMUX and pad control

Digi Embedded Yocto uses the Linux kernel device tree to configure the pad multiplexing and electrical characteristics for each of the reference boards. Customers designing their own boards will create a device tree matching their new board design and may need to configure the pads differently.

See Device tree files and overlays for an explanation of the Digi Embedded Yocto device tree structure.

The following example shows pad selection and IOMUX setting for a particular device: USB_OTG1. On the Linux kernel source, you can find the USB_OTG1 device tree node in arch/arm64/boot/dts/digi/ccimx8mn-dvk.dts

ConnectCore 8M Nano Development Kit device tree
/* USB_OTG1 connected to usb hub */
&usbotg1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg1>;

	vbus-supply = <&reg_3v3_usb_hub>;
	fsl,reset-gpio = <&gpio5 10 GPIO_ACTIVE_LOW>;
	dr_mode = "host";
	disable-over-current;
	status = "okay";
};

The pin configuration is defined on the pinctrl-0 property, assigned the "default" name and set to pinctrl_usbotg1:

ConnectCore 8M Nano Development Kit device tree
pinctrl_usbotg1: usbotg1grp {
	fsl,pins = <
		/* USB hub reset */
		MX8MN_IOMUXC_ECSPI2_SCLK_GPIO5_IO10		0x16
	>;
};

The device tree pinctrl documentation binding explains the fsl,pins entry as consisting of six integers representing the IOMUX selection and electrical settings of the pin.

You can look closely at the macro to discern how the pin name for the IC is connected to the desired pad functionality. From left to right, the first part of the macro after the MX8MN_IOMUXC_ prefix is the PAD/PIN name in the IC. In this example, it is ECSPI2_SCLK. The second part (everything to the right of the PAD/PIN name) represents the functionality you would like to assign to that pad.

The MX8MN_IOMUXC_ECSPI2_SCLK_GPIO5_IO10 macro defined in arch/arm64/boot/dts/freescale/imx8mn-pinfunc.h contains five integers:

#define MX8MN_IOMUXC_ECSPI2_SCLK_GPIO5_IO10	0x0204 0x046C 0x0000 0x5 0x0

These five integers are:

  • IOMUX register offset (0x0204)

  • Pad configuration register offset (0x046C)

  • Select input daisy chain register offset (0x0000)

  • IOMUX configuration setting (0x5)

  • Select input daisy chain setting (0x0)

The sixth integer, 0x16, corresponds to the configuration for the PAD control register. This number defines the low-level physical settings of the pin. You can build this integer using the information found in the device tree pinctrl documentation binding. You can also copy and then modify another pin definition that has similar functionality.

Configure independent pin IOMUX and pad control

You may want to configure an IOMUX setting that is not associated with a specific device driver. An example of this would be a GPIO connected to a push button, LED, or control lines of devices that do not have a binding on their drivers. For that purpose you can define a generic pinctrl-0 property inside the iomuxc node:

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	pinctrl_hog: hoggrp {
		fsl,pins = <
			/* GPIO1_IO10 on expansion connector */
			MX8MN_IOMUXC_GPIO1_IO10_GPIO1_IO10	0x16
			/* GPIO1_IO11 on expansion connector */
			MX8MN_IOMUXC_GPIO1_IO11_GPIO1_IO11	0x16
			/* GPIO1_IO13 on expansion connector */
			MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x16
			[...]
		>;
	};

	[...]
};
Do not configure the same pad twice in the device tree. IOMUX configurations are set by the drivers in the order the kernel probes the configured device. If the same pad is configured differently by two drivers, the settings associated with the last-probed driver will fail to apply and the driver will not be brought up.