Ethernet | ConnectCore MP13

The STMicroelectronics STM32MP13 CPU has two 10/100/1000 Ethernet MAC.

On the ConnectCore MP13 Development Kit:

Ethernet port 1 is connected to a 10/100/1000 Marvell 88E1512-A0-NNP2I000 PHY.
Ethernet port 2 is connected to a 10/100 SMSC LAN8720Ai PHY.

The MAC address and serial number of the SOM are encoded in the data matrix on the SOM label.

Kernel configuration

You can manage the Ethernet driver and PHY device support through the following kernel configuration options:

STM32 Ethernet controller (DWMAC) (CONFIG_DWMAC_STM32)
PHY device support for Marvell (88E1XXX) (CONFIG_MARVELL_PHY)
PHY device support for 10/100 SMSC LAN8720Ai PHY (CONFIG_SMSC_PHY)

These options are enabled as built-in on the default ConnectCore MP13 kernel configuration file.

Kernel driver

The drivers for the Ethernet interface are located at:

File Description

File	Description
`drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c`	DWMAC driver
`drivers/net/phy/marvell.c`	Driver for Marvel PHY 88E1XXX
`drivers/net/phy/smsc.c`	Driver for SMSC PHY

drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c

DWMAC driver

drivers/net/phy/marvell.c

Driver for Marvel PHY 88E1XXX

drivers/net/phy/smsc.c

Driver for SMSC PHY

Device tree bindings and customization

The STM32MP13 Ethernet interface device tree binding is documented at Documentation/devicetree/bindings/net/stm32-dwmac.yaml. The Ethernet interface is defined in the STM32MP13 CPU and ConnectCore MP13 Development Kit device tree files.

Example: DWMAC on ConnectCore MP13 Development Kit

Definition of the DWMAC

STM32MP13 device tree

eth1: eth1@5800a000 {
	compatible = "snps,dwmac-4.20a", "st,stm32mp13-dwmac";
	reg = <0x5800a000 0x2000>;
	reg-names = "stmmaceth";
	interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
			      <&exti 68 1>;
	interrupt-names = "macirq", "eth_wake_irq";
	clock-names = "stmmaceth",
		      "mac-clk-tx",
		      "mac-clk-rx",
		      "ethstp",
		      "eth-ck";
	clocks = <&rcc ETH1MAC>,
		 <&rcc ETH1TX>,
		 <&rcc ETH1RX>,
		 <&rcc ETH1STP>,
		 <&rcc ETH1CK_K>;
	st,syscon = <&syscfg 0x4 0xff0000>;
	snps,mixed-burst;
	snps,pbl = <2>;
	snps,axi-config = <&stmmac_axi_config_1>;
	snps,tso;
	status = "disabled";

	stmmac_axi_config_1: stmmac-axi-config {
		snps,wr_osr_lmt = <0x7>;
		snps,rd_osr_lmt = <0x7>;
		snps,blen = <0 0 0 0 16 8 4>;
	};
};

eth2: eth2@5800e000 {
	compatible = "snps,dwmac-4.20a", "st,stm32mp13-dwmac";
	reg = <0x5800e000 0x2000>;
	reg-names = "stmmaceth";
	interrupts-extended = <&intc GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
	interrupt-names = "macirq";
	clock-names = "stmmaceth",
		      "mac-clk-tx",
		      "mac-clk-rx",
		      "ethstp",
		      "eth-ck";
	clocks = <&rcc ETH2MAC>,
		 <&rcc ETH2TX>,
		 <&rcc ETH2RX>,
		 <&rcc ETH2STP>,
		 <&rcc ETH2CK_K>;
	st,syscon = <&syscfg 0x4 0xff000000>;
	snps,mixed-burst;
	snps,pbl = <2>;
	snps,axi-config = <&stmmac_axi_config_2>;
	snps,tso;
	status = "disabled";

	stmmac_axi_config_2: stmmac-axi-config {
		snps,wr_osr_lmt = <0x7>;
		snps,rd_osr_lmt = <0x7>;
		snps,blen = <0 0 0 0 16 8 4>;
	};
};

IOMUX configuration

ConnectCore MP13 Development Kit device tree

ccmp13_eth1_rgmii_pins: ccmp13-eth1-rgmii-1 {
	pins1 {
		pinmux = <STM32_PINMUX('F', 12, AF11)>, /* ETH1_CLK125 */
			 <STM32_PINMUX('C', 1,  AF11)>, /* ETH1_GTX_CLK */
			 <STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */
			 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_TXD1 */
			 <STM32_PINMUX('C', 2,  AF11)>, /* ETH1_TXD2 */
			 <STM32_PINMUX('E', 5,  AF10)>, /* ETH1_TXD3 */
			 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_TX_EN */
			 <STM32_PINMUX('G', 2,  AF11)>; /* ETH1_MDC */
		bias-disable;
		drive-push-pull;
		slew-rate = <2>;
	};

	pins2 {
		pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */
		bias-disable;
		drive-push-pull;
		slew-rate = <0>;
	};

	pins3 {
		pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */
			 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RXD1 */
			 <STM32_PINMUX('B', 0, AF11)>, /* ETH1_RXD2 */
			 <STM32_PINMUX('B', 1, AF11)>, /* ETH1_RXD3 */
			 <STM32_PINMUX('D', 7, AF10)>, /* ETH1_REF_CLK */
			 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RX_DV */
                bias-disable;
	};
};

ccmp13_eth1_rgmii_sleep_pins: ccmp13-eth1-rgmii-sleep-1 {
	pins1 {
		pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ETH1_CLK125 */
			 <STM32_PINMUX('C', 1,  ANALOG)>, /* ETH1_GTX_CLK */
			 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */
			 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_TXD1 */
			 <STM32_PINMUX('C', 2,  ANALOG)>, /* ETH1_TXD2 */
			 <STM32_PINMUX('E', 5,  ANALOG)>, /* ETH1_TXD3 */
			 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_EN */
			 <STM32_PINMUX('G', 2,  ANALOG)>, /* ETH1_MDC */
			 <STM32_PINMUX('A', 2,  ANALOG)>, /* ETH1_MDIO */
			 <STM32_PINMUX('C', 4,  ANALOG)>, /* ETH1_RXD0 */
			 <STM32_PINMUX('C', 5,  ANALOG)>, /* ETH1_RXD1 */
			 <STM32_PINMUX('B', 0,  ANALOG)>, /* ETH1_RXD2 */
			 <STM32_PINMUX('B', 1,  ANALOG)>, /* ETH1_RXD3 */
			 <STM32_PINMUX('D', 7,  ANALOG)>, /* ETH1_REF_CLK */
			 <STM32_PINMUX('A', 7,  ANALOG)>; /* ETH1_RX_DV */
	};
};

ccmp13_eth2_rmii_pins: ccmp13-eth2-rmii-1 {
	pins1 {
		pinmux = <STM32_PINMUX('F', 7,  AF11)>, /* ETH2_TXD0 */
			 <STM32_PINMUX('G', 11, AF10)>, /* ETH2_TXD1 */
			 <STM32_PINMUX('A', 11, AF13)>, /* ETH2_CLK */
			 <STM32_PINMUX('F', 6,  AF11)>, /* ETH2_TX_EN */
			 <STM32_PINMUX('B', 2,  AF11)>, /* ETH2_MDIO */
			 <STM32_PINMUX('G', 5,  AF10)>; /* ETH2_MDC */
		bias-disable;
		drive-push-pull;
		slew-rate = <1>;
	};

	pins2 {
		pinmux = <STM32_PINMUX('F', 4,  AF11)>, /* ETH2_RXD0 */
			 <STM32_PINMUX('E', 2,  AF10)>, /* ETH2_RXD1 */
			 <STM32_PINMUX('A', 12, AF11)>, /* ETH2_RX_DV */
			 <STM32_PINMUX('F', 11, AF12)>; /* ETH2_RX_ER */
		bias-disable;
	};
};

ccmp13_eth2_rmii_sleep_pins: ccmp13-eth2-rmii-sleep-1 {
	pins1 {
		pinmux = <STM32_PINMUX('F', 7,  ANALOG)>, /* ETH2_TXD0 */
			 <STM32_PINMUX('G', 11, ANALOG)>, /* ETH2_TXD1 */
			 <STM32_PINMUX('A', 11, ANALOG)>, /* ETH2_CLK */
			 <STM32_PINMUX('F', 6,  ANALOG)>, /* ETH2_TX_EN */
			 <STM32_PINMUX('B', 2,  ANALOG)>, /* ETH2_MDIO */
			 <STM32_PINMUX('G', 5,  ANALOG)>, /* ETH2_MDC */
			 <STM32_PINMUX('F', 4,  ANALOG)>, /* ETH2_RXD0 */
			 <STM32_PINMUX('E', 2,  ANALOG)>, /* ETH2_RXD1 */
			 <STM32_PINMUX('A', 12, ANALOG)>, /* ETH2_RX_DV */
			 <STM32_PINMUX('F', 11, ANALOG)>; /* ETH2_RX_ER */
	};
};

Ethernet enabling and PHY parameters

ConnectCore MP13 Development Kit device tree

/* 10/100/1000 Ethernet */
&ethernet0 {
	status = "okay";
	pinctrl-0 = <&{pfm_slug}_eth1_rgmii_pins>;
	pinctrl-1 = <&{pfm_slug}_eth1_rgmii_sleep_pins>;
	pinctrl-names = "default", "sleep";
	phy-mode = "rgmii-id";
	max-speed = <1000>;
	phy-handle = <&phy0_eth1>;
	phy-supply = <&reg_3v3_eth_pwr>;

	mdio0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";

		phy0_eth1: ethernet-phy@0 {
			reg = <0>;
			compatible = "ethernet-phy-id0141.0dd0"; /* PHY ID for Marvell 88E1512 */
			reset-gpios = <&gpioi 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
			reset-assert-us = <1000>;
			reset-deassert-us = <2000>;
		};
	};
};

/* 10/100 Ethernet */
&eth2 {
	status = "okay";
	pinctrl-0 = <&ccmp13_eth2_rmii_pins>;
	pinctrl-1 = <&ccmp13_eth2_rmii_sleep_pins>;
	pinctrl-names = "default", "sleep";
	phy-mode = "rmii";
	max-speed = <100>;
	phy-handle = <&phy0_eth2>;
	st,ext-phyclk;
	phy-supply = <&reg_3v3_eth_pwr>;

	mdio1 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";

		phy0_eth2: ethernet-phy@0 {
			reg = <0>;
			compatible = "ethernet-phy-id0007.c0f0"; /* PHY ID for SMSC LAN8720Ai */
			reset-gpios = <&gpioh 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
		};
	};
};

MAC addresses

The MAC address of the STM32MP13 Ethernet interface is programmed in the U-Boot environment (variable ethaddr) on the ConnectCore MP13 NAND. The MAC address of the Ethernet interface is also printed on the module label. U-Boot writes the MAC address in the ethaddr environment variable into its respective device tree ethernet0 node under the local-mac-address property. For more information, see Environment variables.

Ethernet user space usage

In the Linux system, the Ethernet interface is known as ethX where X is a number, starting at 0, that indicates the interface index. The Ethernet (DWMAC) driver exposes device data through the sysfs at /sys/class/net/ethX. You can use NetworkManager to configure Ethernet settings such as IP and netmask.