The NXP i.MX8M Nano CPU has three SPI buses.

On the ConnectCore 8M Nano system-on-module:

  • All three SPI ports are available (multiplexed with other functionality) either on the castellated or LGA pads.

Kernel configuration

You can manage the SPI driver support through the kernel configuration option:

  • Freescale i.MX SPI controller (CONFIG_SPI_IMX)

This option is enabled as built-in on the default ConnectCore 8M Nano kernel configuration file.

Kernel driver

The SPI bus driver for the ConnectCore 8M Nano system-on-module is located at drivers/spi/spi-imx.c.

Device tree bindings and customization

The i.MX8M Nano SPI interface device tree binding is documented at Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt.

The common i.MX8M Nano CPU device tree defines all the SPI ports. The platform device tree must:

  • Enable the required SPI port, by setting the status property to okay.

  • Choose the chip selects using property cs-gpios and their number using property fsl,spi-num-chipselects.

  • Configure the IOMUX of the pads that will work as SPI port.

  • Add the SPI slave devices as children of the SPI bus node.

Example: SPI3 port (as master) on the ConnectCore 8M Nano Development Kit

ConnectCore 8M Nano Development Kit device tree
&ecspi3 {
	#address-cells = <1>;
	#size-cells = <0>;
	fsl,spi-num-chipselects = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
	cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
	status = "okay";

	/* SPI slave device come here */
};

&iomuxc {
	pinctrl_ecspi3: ecspi3grp {
		fsl,pins = <
			MX8MN_IOMUXC_UART1_RXD_ECSPI3_SCLK		0x82
			MX8MN_IOMUXC_UART1_TXD_ECSPI3_MOSI		0x82
			MX8MN_IOMUXC_UART2_RXD_ECSPI3_MISO		0x82
		>;
	};

	pinctrl_ecspi3_cs: ecspi3cs {
		fsl,pins = <
			MX8MN_IOMUXC_UART2_TXD_GPIO5_IO25		0x40000
		>;
	};
};

SPI user space usage

The SPI bus cannot be accessed directly from user space. Instead, it is accessed via the SPI client drivers. However, a special sample client driver allows raw access to the SPI bus.

SPI device interface

The Linux kernel offers a sample client driver called spidev that gives you read and write data access to the SPI bus through the /dev interface. You can find this driver under the kernel configuration option User mode SPI device driver support (CONFIG_SPI_SPIDEV). On Digi Embedded Yocto this driver is enabled as a loadable module. The default device tree includes the spidev node in the device tree as an SPI device hanging from the SPI bus:

ConnectCore 8M Nano Development Kit device tree
&ecspi3 {
	[...]
	status = "okay";

	/*
	 * Add your slave devices here. Next is an example of spidev.
	 * Expect a harmless kernel warning if you enable spidev as slave.
	 */
	spidev@0 {
		compatible = "spidev";
		spi-max-frequency = <4000000>;
		reg = <0>;
	};
 };

To use it, load the spidev module from user space:

~# modprobe spidev
spidev spi32766.0: buggy DT: spidev listed directly in DT
Spidev is not a real hardware SPI slave device but a detail of how Linux controls a device. Expect a harmless kernel warning if you enable spidev as slave on the device tree. For reference, see https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=956b200a846e324322f6211034c734c65a38e550

Linux will create a device node in the form /dev/spidevX.Y device node where:

  • X corresponds to the SPI port index, starting from 32766 downwards.

  • Y corresponds to the SPI bus chip select, starting from 0 upwards.

Sample application

An example application called apix-spi-example is included in the dey-examples-digiapix recipe (part of dey-examples package) of meta-digi layer. This application is an example of how to write data to an external EEPROM (24FC1026) and read it back using Digi APIx library on the ConnectCore 8M Nano platform.

Go to GitHub to see the application instructions and source code.

See SPI API for more information about the SPI APIx.