The {cpu-family} System-On-Chip has a lot of functionality but a limited number of pins (or pads). Even though a single pin can only perform one function at a time, they can be configured internally to perform different functions. This is called pin multiplexing.

The ConnectCore 6 Plus Hardware Reference Manual contains a Module pinout section that identifies all module pads with their corresponding signal name used in the reference boards schematics, and maps them to the corresponding i.MX pad name.

Pad multiplexing

The NXP {cpu-family} Reference Manual uses a pad name such as SD3_DAT0 to refer to the System-On-Chip pads. This pad name typically corresponds to the first pad functionality. See the IOMUX Controller section of the NXP {cpu-family} Reference Manual for IOMUX configuration registers.

Electrical parameters of a pad

Every pad also has a PAD configuration control register where you can set the pad’s electrical parameters. See the NXP Influence of Pin Setting on System Function and Performance application note for details about setting functional and electrical parameters.

Use the device tree to configure pin IOMUX and pad control

Digi Embedded Yocto uses the Linux kernel device tree to configure the pad multiplexing and electrical characteristics for each of the reference boards. Customers designing their own boards will create a device tree matching their new board design and may need to configure the pads differently.

See Device tree files for an explanation of the Digi Embedded Yocto device tree structure.

The following example shows pad selection and IOMUX setting for a particular device: CAN2. On the Linux kernel source, you can find the CAN2 device tree node in arch/arm/boot/dts/imx6qp-ccimx6qpsbc.dtsi

ConnectCore 6 Plus SBC device tree
&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	stby-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;

The pin configuration is defined on the pinctrl-0 property, assigned the default name and set to pinctrl_flexcan2:

ConnectCore 6 Plus SBC device tree
pinctrl_flexcan2: can2 {
	fsl,pins = <
		MX6QDL_PAD_GPIO_5__GPIO1_IO05    0x1b0b0

The device tree pinctrl documentation binding explains the fsl,pins entry as consisting of six integers representing the IOMUX selection and electrical settings of the pin.

You can look closely at the macro to discern how the pin name for the IC is connected to the desired pad functionality. From left to right, the part of the macro after the MX6QDL_PAD_ prefix and up to the double underscore is the PAD/PIN name in the IC. In this example, it is SD3_DAT0. The second part (everything to the right of the double underscore) represents the functionality you would like to assign to that pad.
Breakdown of pin function macro

The MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX macro defined in arch/arm/boot/dts/imx6q-pinfunc.h contains five integers:

#define MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX	0x2c0 0x6a8 0x000 0x2 0x0

These five integers are:

  • IOMUX register offset (0x02C0)

  • Pad configuration register offset (0x06A8)

  • Select input daisy chain register offset (0x0000)

  • IOMUX configuration setting (0x2)

  • Select input daisy chain setting (0x0)

The sixth integer, 0x1b0b0, corresponds to the configuration for the PAD control register. This number defines the low-level physical settings of the pin. You can build this integer using the information found in the device tree pinctrl documentation binding. You can also copy and then modify another pin definition that has similar functionality.

Configure independent pin IOMUX and pad control

You may want to configure an IOMUX setting that is not associated with a specific device driver. An example of this would be a GPIO connected to a push button, LED, or control lines of devices that do not have a binding on their drivers. For that purpose you can define a generic pinctrl-0 property inside the iomuxc node:

ConnectCore 6 Plus SBC device tree
&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	hog {
		pinctrl_hog: hog {
			fsl,pins = <
				/* AUD_HP_DET */
				MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
				/* USER_LED0 */
				MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
				/* USER_LED1 */
				MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
Do not configure the same pad twice in the device tree. IOMUX configurations are set by the drivers in the order the kernel probes the configured device. If the same pad is configured differently by two drivers, the settings associated with the last-probed driver will fail to apply and the driver will not be brought up.