The NXP {cpu-family} CPU has four SPI buses and a Flexible SPI interface with two ports than can operate as Quad-SPI.

On the ConnectCore 8X system-on-module:

  • All four SPI ports are available (multiplexed with other functionality) either on the castellated or LGA pads

  • Quad-SPI B port is available on the LGA pads

On the ConnectCore 8X SBC Pro:

  • SPI0 port is available at the expansion header with two chip selects (CS0 and CS1)

Kernel configuration

You can manage the SPI driver support through the kernel configuration option:

  • Freescale i.MX LPSPI controller (CONFIG_SPI_FSL_LPSPI)

This option is enabled as built-in on the default ConnectCore 8X kernel configuration file.

Kernel driver

The SPI bus driver for the ConnectCore 8X system-on-module is located at drivers/spi/spi-fsl-lpspi.c.

Device tree bindings and customization

The {cpu-family} SPI interface device tree binding is documented at Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt.

The common {cpu-family} CPU device tree defines all the SPI ports. The platform device tree must:

  • Enable the required SPI port, by setting the status property to "okay".

  • Choose the chip selects using property cs-gpios and their number using property fsl,spi-num-chipselects.

  • Configure the IOMUX of the pads that will work as SPI port.

  • Add the SPI slave devices as children of the SPI bus node.

Example: SPI0 port (as master) on the ConnectCore 8X SBC Pro

ConnectCore 8X SBC Pro device tree
&lpspi0 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpspi0>;
	status = "okay";

&iomuxc {
	pinctrl_lpspi0: lpspi0grp {
		fsl,pins = <
			SC_P_SPI0_SCK_ADMA_SPI0_SCK	0x0600004c
			SC_P_SPI0_SDO_ADMA_SPI0_SDO	0x0600004c
			SC_P_SPI0_SDI_ADMA_SPI0_SDI	0x0600004c
			SC_P_SPI0_CS0_ADMA_SPI0_CS0	0x0600004c
			SC_P_SPI0_CS1_ADMA_SPI0_CS1	0x0600004c

Using the SPI interface

You can access the SPI interfaces from your Android application. See SPI API for more information about the SPI APIx.

Sample application

The SPI Sample Application demonstrates the usage of the SPI API by monitoring the communication with a slave device. The application allows reading, writing and transferring data to the slave device.

Go to GitHub to see the application instructions and source code.


Quad-SPI bus cannot be used on the ConnectCore 8X SBC Pro out of the box. Quad-SPI interface lines conflict with many other interfaces, such as Ethernet, RS485, CAN or MIPI Camera. Besides, the ConnectCore 8X SBC Pro doesn’t contain any Quad-SPI slave device.

Digi Embedded for Android includes a sample reference device tree overlay that enables the Quad-SPI bus to interface a NOR Flash memory. This device tree overlay disables all conflicting interfaces of the ConnectCore 8X SBC Pro.