The LVDS Display Bridge (LDB) connects the Display Processing Unit (DPU) to an external LVDS display interface.

On the ConnectCore 8X SBC Pro:

  • There are two LVDS display connectors.

Kernel configuration

You can manage the LDB support through the following kernel configuration option:

  • Support for LVDS displays (CONFIG_DRM_IMX_LDB)

This option is enabled as built-in on the default ConnectCore 8X kernel configuration file.

Kernel driver

The driver for the LDB interface is located at:

File Description

drivers/gpu/drm/imx/imx-ldb.c

i.MX LDB driver

Device tree bindings and customization

The i.MX8QXP LDB interface is documented at Documentation/devicetree/bindings/display/imx/ldb.txt. The LDB interface is defined in the i.MX8QXP CPU, ConnectCore 8X SBC Express, and ConnectCore 8X SBC Pro device tree files.

Example: LVDS display bridge 1 (LDB1) on ConnectCore 8X SBC Pro

Definition of the LDB1

i.MX8QXP device tree
ldb1: ldb@562210e0 {
	#address-cells = <1>;
	#size-cells = <0>;
	compatible = "fsl,imx8qxp-ldb";
	clocks = <&clk IMX8QXP_MIPI0_LVDS_PIXEL_CLK>,
		 <&clk IMX8QXP_MIPI0_LVDS_BYPASS_CLK>;
	clock-names = "pixel", "bypass";
	power-domains = <&pd_mipi_dsi0>;
	gpr = <&lvds_region1>;
	status = "disabled";

	lvds-channel@0 {
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0>;
		phys = <&ldb1_phy>;
		phy-names = "ldb_phy";
		status = "disabled";

		port@0 {
			reg = <0>;

			ldb1_ch0: endpoint {
				remote-endpoint = <&dpu_disp0_lvds0_ch0>;
			};
		};
	};

	lvds-channel@1 {
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <1>;
		phys = <&ldb1_phy>;
		phy-names = "ldb_phy";
		status = "disabled";

		port@0 {
			reg = <0>;

			ldb1_ch1: endpoint {
				remote-endpoint = <&dpu_disp0_lvds0_ch1>;
			};
		};
	};
};

IOMUX configuration

The LVDS interfaces use dedicated pins. No IOMUX configuration is necessary. There is an IOMUX entry for associated GPIO pins.

ConnectCore 8X SBC Pro device tree
	pinctrl_lvds0: lvds0grp {
		fsl,pins = <
			/* LVDS0 touch interrupt */
			SC_P_QSPI0B_DATA2_LSIO_GPIO3_IO20       0x06000020
			/* LVDS0 PWM backlight */
			SC_P_MIPI_DSI0_GPIO0_00_MIPI_DSI0_PWM0_OUT      0x00000020
		>;
	};

LVDS channels

ConnectCore 8X SBC Pro device tree
&ldb1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lvds0>;
	status = "okay";

	lvds0: lvds-channel@0 {
		fsl,data-mapping = "jeida";
		fsl,data-width = <24>;
		status = "okay";

		display-timings {
			native-mode = <&g101evn010_1>;

			/* AUO G101EVN01.0 */
			g101evn010_1: timing@0 {
				clock-frequency = <68930000>;
				hactive = <1280>;
				vactive = <800>;
				hfront-porch = <120>;
				hback-porch = <0>;
				hsync-len = <8>;
				vback-porch = <10>;
				vfront-porch = <0>;
				vsync-len = <6>;
				hsync-active = <1>;
				vsync-active = <1>;
				de-active = <1>;
				pixelclk-active = <0>;
			};
		};
	};
};